Circuit Extraction Techniques Provide Faster Interconnect Modeling and Analysis

Communica t i ons designers developing products with GHz frequencies and Gbps edge rates who are using traditional printed circuit board (PCB) signal integrity (SI) solutions are finding that while their designs behave well under virtual prototype or simulation scenarios, they are failing when migrated to build and test. Why? Because the design of the interconnects above 1 GHz is an increasingly important issue—no longer a secondor third-order effect that can be largely ignored. Due to both large-scale integration and higher operating frequencies, interconnects no longer operate as simple lumped RLC circuits and so the modeling and simulation of these high-performance and complex design inter-connections must be taken into account from the get-go. If not, designers find themselves spending excessive time and money on redesigns and re-spins, and experimenting on the test bench, which adds cost to the final products not only with additional “fix-it” components, but ultimately in lost market window opportunities. The new Microwave Office® 2007 Design Suite from Applied Wave Research, Inc. (AWR®) introduces innovative circuit extraction technology developed specifically to deliver productivity benefits to the designers of today’s complex, next-generation communications products. This novel circuit extraction design approach, coined ACETM for Automated Circuit Extraction, dramatically reduces from hours to seconds the time required to do the initial modeling of complex interconnects. In addition, it enables the designer to perform interconnect modeling at the earliest stages of the design flow, where problems can be identified and corrected before costly and time-consuming redesigns are required. These benefits deliver a higher degree of confidence in less design cycle time, ensuring that products will be volume manufacturable, cost-effective, and achieve their market window of opportunity. The AWR circuit extraction technology enables designers using Microwave Office software to leverage layout-based models for circuit extraction as opposed to traditional schematic based designs/flows. It provides a dramatic and revolutionary methodology shift to layout-driven simulation through a sophisticated mechanism for automating the bookkeeping and partitioning of structures into pre-existing models. The introduction of this technology is ground-breaking in that productivity is enhanced further through the use of AWR’s Intelligent NetTM (iNet) schematic-layout interconnect automation technology. This capability is ideal for RF/microwave designs where the modeling of interconnects is not well suited to traditional circuit-based This article introduces an EDA technique that automates the of analysis of complex interconnections in high frequency circuits and packages